发明名称 DATA TRANSFER CONTROLLING SYSTEM
摘要 PURPOSE:To prevent service.out and command.out from simultaneous turning on by executing an on/off control of a tag.out signal by the contents of one of two registers outputted by a state of a flip.flop. CONSTITUTION:When service.out SVi becomes on, a signal DRQ1 of clock synchronization becomes on. With on of the signal DRQ1 as a turning point, a calculation of byte count is executed. In case when the byte count becomes zero, a pulse is outputted onto a signal line S2. In this case, it is assumed that a signal switch is off, and a signal I switch is on. In that case, logic ''0'' is set to a flip.flop 43, logic ''1'' is set to a flip.flop 44, and as a result, a signal ACCOKR becomes off, and a signal CMORespR becomes on. In this case, a signal ACCOKL is on, and a signal CMORespL is off.
申请公布号 JPS60181955(A) 申请公布日期 1985.09.17
申请号 JP19840038403 申请日期 1984.02.29
申请人 FUJITSU KK 发明人 NISHIMURA KOUSUKE
分类号 G06F13/12;G06F13/42 主分类号 G06F13/12
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