发明名称 INFORMATION MEMORY SYSTEM
摘要 PURPOSE:To invert easily a desired bit regardless of the address conversion mode and to switch a desired memory section, by providing a circuit at the preceding stage of a circuit which performs address conversion for interleave in order to invert the bit of an address signal which designates an information memory section and then inverting the address signal bit by an inverting circuit for switch of the information memory section. CONSTITUTION:When a bit MA is inverted by an inverting circuit 26 with a switch signal S2 of a memory section, an information store area is changed to a memory. Then the left half is switched to the right half or vice versa by switching a bit alpha. This switching action is carried out before conversion of addresses and therefore no attention is needed regardless of modes MA and alpha-gamma of the address conversion. A memory protection mechanism is sometimes provided to a memory system. If a hard error is produced in an area where said protection mechanism is used, the highest bit of an address signal is inverted to switch an access to an unused area (half) from an area (half) under use. Thus the actuation of an information memory system can be continued regardless of a hard error. In such a case, the bit inversion is effective.
申请公布号 JPS60181852(A) 申请公布日期 1985.09.17
申请号 JP19840037462 申请日期 1984.02.29
申请人 FUJITSU KK 发明人 NAKABAYASHI KUNIO;NISHIDA HIDEHIKO
分类号 G06F12/06;(IPC1-7):G06F12/06 主分类号 G06F12/06
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