发明名称 Process for the positioning of an interconnection line on an electrical contact hole of an integrated circuit
摘要 An improvement to the process for positioning an interconnection line on an electrical contact hole of an integrated circuit, according to which between a photosensitive coating and an insulating coating is interposed an intermediate anti-reflecting coating made e.g. from SiO2 or amorphous silicon. The SiO2 intermediate coating, etched after irradiation of the photosensitive material coating, is used as a mask for reactive ionic etching of the insulating coating. Thus, the image of the photosensitive material coating is transferred to the thick insulating material coating. This process is useful especially in the production of integrated circuits.
申请公布号 US4541892(A) 申请公布日期 1985.09.17
申请号 US19840639587 申请日期 1984.08.10
申请人 COMMISSARIAT A L'ENERGIE ATOMIQUE 发明人 JEUCH, PIERRE
分类号 H01L21/3213;H01L21/768;H01L23/31;H01L23/532;(IPC1-7):C23F1/02;B44C1/22;C03C15/00;C03C25/06 主分类号 H01L21/3213
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