发明名称 |
Testing method and structure for leakage current characterization in the manufacture of dynamic RAM cells |
摘要 |
A testing method and structure for leakage current characterization in the manufacture of dynamic RAM cells; the testing structure includes two large gate-controlled diodes, each diode having a diffused junction which is substantially identical with that of the other diode, the gates of the diodes having different perimeter-to-area ratios, such that when testing is carried out, the leakage current components due to the contribution of the thin oxide area can be isolated from the perimeter-contributed components of the isolating thick oxide; dynamic testing can also be performed and, because of the small area for the test site, an "on chip" amplifier can be provided at the site.
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申请公布号 |
US4542340(A) |
申请公布日期 |
1985.09.17 |
申请号 |
US19820454900 |
申请日期 |
1982.12.30 |
申请人 |
IBM CORPORATION |
发明人 |
CHAKRAVARTI, SATYA N.;GARBARINO, PAUL L.;MILLER, DONALD A. |
分类号 |
H01L27/10;H01L21/66;H01L21/822;H01L27/04;H01L27/108;(IPC1-7):G01R31/26;G01R31/00 |
主分类号 |
H01L27/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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