| 摘要 |
PURPOSE:To improve the accuracy of speed control by averaging and integrating errors for a prescribed time in a speed control system of a closed loop system causing a steady-state deviation so as to calculate the steady-state deviation. CONSTITUTION:A target value Nr and speed information N in the normal closed loop type speed control system are given to a subtraction circuit 16, where a speed error E is produced, which is inputted to an adder circuit 18 of a virtual error calculation circuit 17. The adder circuit 18 adds the accumulated value so far stored in a register 19 and a present speed error in a period (1ms) of a clock B, and the high-order 8-bit is read in the period (256ms) of a clock C. The average deviation is integrated further by an integration device comprising an adder circuit 20 and a register 21 to produce a steady-state speed deviation, which is added to the speed error E by an adder circuit 22, and the result is fed to a motor current calculating circuit 13 as a virtual speed error E'. |
