发明名称 DIGITAL ANALOG CONVERTER
摘要 PURPOSE:To attain low cost by adopting the capacitor switch switching system to apply weighting by an input digital value at a time region thereby decreasing number of elements. CONSTITUTION:A switch S is driven a signal in a frequency (f), and when the switch S is changed over to the position of contact (a), a capacitor C is charged up into a voltage V1, and when the switch S is changed over to the position of contact (b), the capacitor is charged to a voltage (V2-VBE). An electric charge of Q=(V2-VBE-V1).C is injected to an emitter of a transistor (TR) and a current flows to a load resistor RL. Since the electric charge is given f-times per second, the average current I is Q.f(V2-VBE-V1).f.C and a voltage of V0=RL.I is generated. The circuit is connected as shown in the figure and a frequency driving each switch S is frequency-divided by flip-flops FFn-FF0, then binary weighting is applied. Collectors of TRs are connected in a way of wired-OR and the common load resistor RL is used, and an analog output is obtained at an output terminal of an LPF.
申请公布号 JPS60180220(A) 申请公布日期 1985.09.14
申请号 JP19840034406 申请日期 1984.02.27
申请人 CANON KK 发明人 NAGASHIMA YOSHITAKE
分类号 H03M1/74;(IPC1-7):H03M1/74 主分类号 H03M1/74
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