| 摘要 |
PURPOSE:To eliminate the generation of jitters in a video signal by controlling the reading from a memory circuit by means of a read clock signal, which synchronizes with a synchronizing signal through a frequency selecting circuit for removing jitter components. CONSTITUTION:A signal of a frequency 2fH, synchronizing with a synchronizing signal SSYNC of a horizontal frequency fH can be obtained from a voltage control oscillator 17 and supplied to a phase comparator 19. Although jitters always occurs in the signal SSYNC, jitters will not occur in the signal supplied to the comparator 19 by means of the oscillator 17 owing to a function of a PLL circuit 15 constituting a frequency selecting circuit for removing jitters. Thus a read clock signal CLKR obtained by a voltage control oscillator 13 synchronizes with the signal SSYNC and never has jitters. As a result jitters never occur in a luminance signal Y', color difference signals (R-Y)' and (B-Y)' obtained from a memory circuit 8, and an excellent video signal can be obtained.
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