摘要 |
<p>PURPOSE:To increase the density of a ROM by forming an N-type poly Si wiring layer connected only to an N layer on one side while crossing an insulated gate elec trode on a P type Si substrate and superposing a second wiring layer selectively con nected to an Si3N4 mask in response to the presence of the Si3N4 mask. CONSTITUTION:A gate oxide film 33 and a P added poly Si gate electrode 34 are shaped to a P-type Si substrate 31, and N layers 35, 36 are formed through the implan tation of As ions. The surface is coated with SiO2 37 and a connecting hole 38 with a drain 35 is is shaped, doped poly Si 39 and an Si3N4 mask 40 are superposed and oxidized, and an insulating film 41 and a first wiring layer 42 are formed. An Al layer 43 is superposed and data lines 45 are shaped through a patterning, and the drain 35 is connected to the data lines 45 through the wiring layer 42 in response to the presence of the Si3N4 mask. Since a contact between Al 43 and poly Si 42 does not depend upon the connecting hole and depends upon a plane contact by the presence of the mask 40, thus eliminating the need for the extension of the hole 38 and the drain 35, then largely reducing the size of a cell in the direction of word lines 44 by the poly Si gate electrode 34, provided that a ROM having the high degree of integration is acquired.</p> |