发明名称 NONLINEAR ARITHMETIC CIRCUIT
摘要 PURPOSE:To provide optional and free arithmetic characteristics by read a bit pattern written in ROM, performing D/A conversion and generating a period function string, and generating a binary-coded signal string on the basis of said sequence and calculating the mean value. CONSTITUTION:A counter 32 counts up in response to clock pulses from an oscillation circuit, and the counted value of the counter 32 is connected to the address bus 36 of the ROM35. Then, a memory address of the ROM35 is read successively every time a clock pulse is inputted. An analog signal corresponding to the bit pattern written in the ROM35 is obtained as the output of a D/A converter 38. The output signal of this D/A converter 38 and a signal 43 to be operated are led to a comparator 40, which outputs the binary signal string 53. This binary signal string 53 is passed through a low-pass filter 41 to output an analog signal having a level determined by the duty ratio of the binary signal string 53.
申请公布号 JPS60178585(A) 申请公布日期 1985.09.12
申请号 JP19840032527 申请日期 1984.02.24
申请人 FUJI DENKI SEIZO KK 发明人 KATOU SHIGERU
分类号 G06F1/02;G06G7/26 主分类号 G06F1/02
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