发明名称 DIGITAL SOFT DECISION DEMODULATOR
摘要 PURPOSE:To improve the estimating accuracy of an original signal and to obtain a large error correction gain by using the result of soft decision as an input signal to be applied to an error correction circuit. CONSTITUTION:The input modulation signal fed from an input terminal 11 is quantized to 2<n>-1 levels by 2<n>-1 units of comparators 22 then outputted in the form of 2<n>-1 units of binary digital signals. The outputsof these comparators 22 are converted into n-bit outputs by a logical converting circuit 23. An input signal 26 with no noise, and an input signal 27 deteriorated by noise are sampled by a D type flip-flop 13 with a reference carrier wave to sampling timing 28. The signal 26 is not deteriorated by noise and therefore a soft decision output 11 is obtained with the timing 28. While a soft decision output 10 is obtained since the waveform of the signal 27 is deteriorated by noise. The level of quantization is shown by ''29'' fed at the right end of the figure.
申请公布号 JPS60178757(A) 申请公布日期 1985.09.12
申请号 JP19840034817 申请日期 1984.02.24
申请人 NIPPON DENSHIN DENWA KOSHA 发明人 UMEHIRA MASAHIRO;MORIKURA MASAHIRO;KATOU SHIYUUZOU
分类号 H04L27/233;(IPC1-7):H04L27/22 主分类号 H04L27/233
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