发明名称 DIRECT MEMORY ACCESS CONTROLLER
摘要 PURPOSE:To handle flexibly a request by giving priority to an urgent DMA request according to a CPU's judgement. CONSTITUTION:A CPU1 makes a judgement and an indication to information transferred from a DMA controller 2. The DMA controller 2 performs priority processing for requests from DMA request parts 8(0)-8(m). When a register part 6 is so registered that the DMA request signal from the DMA request part 8(1) is given top priority according to the judgement made by the CPU1, a switching and judging part 7(1) performs switching to a request line RO according to the registration contents of the register part 6 even if DMA request signals are outputted from the DMA request parts 8(0) and 8(1) at the same time, so the DMA request signal from the DMA request part 8(1) is handled preferentially.
申请公布号 JPS60178568(A) 申请公布日期 1985.09.12
申请号 JP19840033540 申请日期 1984.02.24
申请人 FUJITSU KK 发明人 HOSHINO TOMOHARU
分类号 G06F13/28;G06F13/30 主分类号 G06F13/28
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