Self compensating ROM circuit

摘要

A compensation arrangement is shown for the diffused column line resistance in an N channel metal gate read only memory. The circuit employs a dummy column which has a transistor at each possible location operated from the same decoder that operates the metal gate rows. A current sense circuit clamps the column pull-up end of the dummy column line and provides a correction signal that is fed to the pull-up devices in the memory columns. A second current sense circuit clamps the dummy column sense amplifier end of the column line and provides a correction signal that can be used to compensate the reference currents in column sense amplifiers using differential current sensing.