| 摘要 |
PURPOSE:To track easily the operation of a hardware of an optional information processing unit by starting the 2nd means when the logical state where the 1st means is designated in advance is detected. CONSTITUTION:A logical circuit 1 detects the establishment of A.B+C as to three state signals A, B, C. In the MODE1, an AND gate 4 is made effective and a state detection signal 2 is transmitted to a counter 6 via an OR gate 5. When a mode signal MODE1 is zero, an AND gate 3 is made effective. Then a value of a count-up signal X is transmitted to the counter 6 via a gate 5. A logical circuit 7 is made effective by the MODE2 and a clock K1 reaches zero when the signal 2 is set so as to stop the operation of the distributed circuit. In the MODE3, an AND gate 8 is made effective and when the signal 2 is set, the present content of the register 10 is stored. In the MODE4, the AND gate 11 is made effective, and when the signal 2 is set, the content of the history circuit 13, that is, the value of a signal group S1 is stored. |
