| 摘要 |
PURPOSE:To reduce an error due to round-up and round-down and to obtain output data approximating an original signal by rounding up or off fractions of the operation results of an operating circuit in an average value circuit in accordance with secondary differential characteristics of the original analog signal. CONSTITUTION:Binary data 1a-1d are added to 4-bit data from a latch circuit 4 by a full adding circuit 16 and are outputted as 5-bit data including carry. In this case, if an analog signal is projected upward at, for example, a timing t3, the MSB of the output of a full adding circuit 24 is ''1'', and fractions of upper 4 bits of the full adding circuit 16 are rounded up, and upper 4 bits are outputted. If the analog signal is projected downward, the MSB of the output of the full adding circuit 24 is ''0'', and fractions are rounded off, and upper 4 bits are outputted from the full adding circuit 16.
|
