发明名称 GALLIUM ARSENIDE INTEGRATED CIRCUIT
摘要 PURPOSE:To simplify a process by changing the gate length of gate electrodes in each GaAs MESFET in response to the threshold voltage of a GaAs MESFET to be controlled. CONSTITUTION:Si<+> ions are implanted to a semi-insulating GaAs substrate 49, and N type GaAs crystal layers 41, 42 are formed through annealing. A gate electrode such as one 43 in 1.2mum gate length is shaped on the N type GaAs crystal layer 41 and a gate electrode such as one 44 in 0.3mum gate length on the N type GaAs crystal layer 42. An enhancement type FET is constituted by the N type GaAs crystal layer 41, the gate electrode 43 and ohmic electrodes 45, 46, and a depletion type FET is constituted by the N type GaAs crystal layer 42, the gate electrode 44 and ohmic electrodes 46, 47. When a wiring metal 48 for electrically connecting the gate electrode 44 to the ohmic electrode 46 is formed, the ohmic electrode 45 is brought to grounding potential and positive potential is applied to the ohmic electrode 47, an inverter circuit having E/D constitution as a whole is constituted.
申请公布号 JPS60176277(A) 申请公布日期 1985.09.10
申请号 JP19840031729 申请日期 1984.02.22
申请人 NIPPON DENKI KK 发明人 KATANO FUMIAKI
分类号 H01L27/095;H01L21/8222;H01L27/082;H01L29/80 主分类号 H01L27/095
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