| 摘要 |
PURPOSE:To improve the speed of a circuit by differentiating the thickness of a gate insulating film of an MOS transistor of an active region and that of an insulating film under polycrystalline silicon wirings of a crossing region, thereby reducing the parasitic capacity of the crossing region. CONSTITUTION:A polycrystalline silicon layer is formed on a thin thermal oxide film of an active region X and a crossing region Z, and patterned to form polycrystalline silicon wirings 27, and polycrystalline silicon wirings 28. Then, a gate insulating film 29 is formed on the gate electrodes 27 and the active region X, and an oxide film pattern 30 is formed on the region Z. In order to increase the thickness of the pattern 30 under the wirings 28 larger than that of the film 29 of an MOS transistor TN of the region X, the parasitic capacity produced at the region Z is reduced as compared with the conventional one, thereby improving the speed of a circuit. |
