| 摘要 |
PURPOSE:To improve the area efficiency and to enhance the universality of a semiconductor integrated circuit device by employing a master chip in which basic cells commonly used for a memory unit block and logic gag block, and disposing the blocks in a matrix state. CONSTITUTION:A random access memory macro block 50 has 1-word X 1-bit random access memory unit block 100, a read/write control block 220', data buffer circuit blocks 222-0-222-N, a read/write timing signal generator block 221. The block 221 has drivers for write and read signals. The block 222 has two clock inverters for write and read, and controlled through lines 232-235 by the write and read signals of the lines 230, 231. The block 220' has 2-input NOR gate and 2 inverters, receives an address signal ADR and a write enable signal WE, and outputs word control signals W, S. |
