| 摘要 |
PURPOSE:To obtain rapid and highly integrated arithmetic unit and arithmetic circuit by mixing a bipolar transistor (TR) with a field effect transistor (FET) in the arithmetic unit provided with a register group and an arithmetic circuit. CONSTITUTION:The register group 400 is a port RAM. Its one-bit constitution consists of an NMOSTR500 forming a port 421-0, CMOS inverters 501, 502 which are one-bit memories and NMOS TRs 503-506 forming ports to a reading bus. One bit of a precharge & sense circuit 401 corresponding to the reading bus 410-0 is constituted of an NPN bipolar TR512 for precharging the reading bus 410-0, CMOS inverters 507-509 controlling the TR512 and a PMOSTR511. |
