发明名称 ARITHMETIC PROCESSING UNIT
摘要 PURPOSE:To attain interruption by a numeric word in a program instruction by generating the interruption when the numeric word in the program instruction and a value of a register possible for setting of an optional value thereto are coincident. CONSTITUTION:An optinal value is set to a conventional register group and a comparison register 20 by a program instruction. Moreover, a value of a memory data register 9 is outputted on an internal bus 10 and this value is set to a register in a conventional (arithmetic) register group 1. The value of the register 9 is a numeric word in the instruction word, a control circuit 4 starts a comparator circuit 21 through a control signal line 11 so that the value of the comparison register 9, that is, the data on the internal bus 10 is compared with a comparator circuit 21 for the comparison. When both the values are coincident, a coincidence signal 23 is outputted, an interruption generating circuit 22 is started and a preset value is set to a program counter 5.
申请公布号 JPS60173640(A) 申请公布日期 1985.09.07
申请号 JP19840028691 申请日期 1984.02.20
申请人 CANON KK 发明人 TAMURA NOBORU
分类号 G06F9/48;G06F11/07;G06F11/28 主分类号 G06F9/48
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