发明名称 MEMORY DATA CORRECTION SYSTEM
摘要 PURPOSE:To correct the content of storage from which an error is detected by storing an address transmitted to an active storage device and reading the data from the said address of a space storage device when the read data error is detected. CONSTITUTION:An active central controller CC0 writes the same data to the same address of main storage devices MM0 and MM1 and reads the data only from the active main storage device MM0. Moreover, an address a1 transmitted to the main storage devices MM0, MM1, is stored in an address storage circuit AH1. When the active main storage device MM0 detects an error in a read data d1, an error detection signal pe0 transmits an address a2 transmitted and stored in the address storage circuit AH1 to the spare main storage device MM1, a data d2 is read and given to the active main storage device MM0. The active main storage device MM0 writes the data d2 to the address a2 and correct the data d1 by the data d2.
申请公布号 JPS60173646(A) 申请公布日期 1985.09.07
申请号 JP19840029000 申请日期 1984.02.17
申请人 FUJITSU KK 发明人 ETOU KOUJI;IGI YOUZOU
分类号 G06F12/16;(IPC1-7):G06F12/16 主分类号 G06F12/16
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