| 摘要 |
PURPOSE:To improve the integration density by constituting a device so that reduction of the arrangement pitch of columns is not hindered by insertion of an active pull-up circuit. CONSTITUTION:Gate circuits consisting of transistors TRs Q103, Q104, Q115, Q116... to which a control signal BSC1 is given are inserted about centers of individual pairs of bit lines to divide a cell array to cell array blocks CLA1 and CLA2. Sense amplifiers SA01, SA02... are connected to pairs of divided bit lines BL01, -BL01, BL02, -BL02... of individual blocks respectively. Active pull-up circuits AP0, AP1, AP2... are connected to one ends of individual pairs of bit lines respectively, and in this case, even-numbered active pull-up circuits AP0, AP2... are arranged for every other pair of bit lines along one end of the cell array, and odd-numbered active pull-up circuits AP1... are arranged similarly along the other end. |
