| 摘要 |
PURPOSE:To obtain a signal selecting circuit having a simple constitution which extracts the potential of a selected word line, that is, extracts one from plural signals, by providing plural P-channel MOS transistors TRs and plural CMOS inverters and allowing one input signal to pass through to use it as an output signal when only this input signal rises among plural input signals. CONSTITUTION:The output of an inverter I1 is inputted to the gate of a transistor TRQ5, and similarly, outputs of inverters I2 and I3 are inputted to gates of TRs Q6 and Q7 respectively, and an input signal phi1 is inputted to the gate of the inverter I1 and the source of the P-channel TRQ5, and similarly, input signals phi2 and phi3 are inputted to gates of inverters I2 and I3 and sources of P- channel TRs Q6 and Q7 respectively. Drains of P-channel TRs Q5-Q7 are connected to one another to lead out an output terminal Ts and are connected to the drain of an N-channel TRQ8. The circuit is so constituted that input signals open gates by themselves to pass through when they rise and gates are closed when they fall.
|
