发明名称 |
PIPELINE PROCESSING VITERBI DECODER |
摘要 |
PURPOSE:To improve the throughout by executing in parallel the path metric calculation and comparison. CONSTITUTION:The path metric value of added output selected by selectors 37, 38 is compared and path selecting information is outputted to a comparator 41 in adding the next path metric value by adders 31-34. Since the path metric value of the preceding added output is compared by the comparator 41, the pipeline processing is attained.
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申请公布号 |
JPS60173930(A) |
申请公布日期 |
1985.09.07 |
申请号 |
JP19840028488 |
申请日期 |
1984.02.20 |
申请人 |
FUJITSU KK |
发明人 |
YAMASHITA ATSUSHI;KATOU TADAYOSHI;KURIHARA HIROSHI |
分类号 |
G06F11/10;H03M13/23;H03M13/41 |
主分类号 |
G06F11/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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