| 摘要 |
PURPOSE:To synchronize subsequently a clock of a local network to a clock of a high-order network by using a CC channel where a free bit number of an FIFO provided in a gateway is assigned to a frame of an extension bus and reporting the number to a system controller so as to only connect the high- order network to the extension bus via the gateway. CONSTITUTION:The extension bus 5 is incorporated with a terminal device 1 having input/output and transmission control function, a gateway section 4 having an interface function with the high-order network and a clock of the local network and is connected with a system controller section 3 controlling the network and connected to the high-order network 2 with a bus similar to the extension bus 5. The free bit number of the FIFO in the gateway section 4 is coded and it is reported to the system controller section 3 by using the CC channel 9 so as to synchronize subsequentialy the transmission clock speed of the system controller section 3, that is, the read speed of the FIFO with the high-order network 2. |
