发明名称 ANALOG DIGITAL CONVERTING CIRCUIT
摘要 PURPOSE:To obtain an A/D converter at high speed, low power consumption and small size by constituting the circuit that the high speed converting performance being the highest feature of the parallel type is maintained and the cascade connection type is used together. CONSTITUTION:An A/D1 is a cascade connection type A/D converter having m- bit resolution, m-set of amplifiers A1, A2-Am are connected in cascade, and consists of comparators C1, C2-Cm of the same number connected in parallel with the input terminals of the amplifiers A1, A2-Am and a code converter EC1 converting a gray code output signal from the comparators C1, C2-Cm into a binary code. When the conversion of a parallel A/D converter A/D2 is attained by using a clock signal of duty ratio of 50%, if the convertion of the cascade connection type A/D converter A/D1 is finished in the pause period, the converting speed of the A/D converter using the cascade connection type and the parallel type in common is equal to the converting speed of the parallel A/D converter. Moreover, since the circuit scale is decreased because of the number of cascade connection types is increased and the low power consumption, small size and economy are attained.
申请公布号 JPS60172824(A) 申请公布日期 1985.09.06
申请号 JP19840024727 申请日期 1984.02.13
申请人 NIPPON DENSHIN DENWA KOSHA 发明人 YAMAGATA AKINORI;OBARA MAMORU
分类号 H03M1/44;(IPC1-7):H03M1/44 主分类号 H03M1/44
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