| 摘要 |
PURPOSE:To discriminate easily the ordering of timing signal by providing plural blocks comprising a coincidence circuit means, an adder, a register, a set means and a display means and using an output of each adder as other input to the adder of the other block. CONSTITUTION:A signal of ''1'' or ''0'' level before a timing signal is given to input terminals 1, 21, 41, and it is displayed on LED display devices 2, 22, 42. Then switches 3, 23, 43 are set to the state opposite to said display state. When the timing signal is given to a block B while the timing signal is given to block A at first, the lighting state of the display device 22 is inverted, a pulse is outputted from the coincidence circuit means 32, the output of the adder 26 goes to [2], and [2] is displayed on a numeric display device 31 by this output. The FF9 is set already in this state and an FF49 is not set yet, then the display devices 11, 51 remain [1], [0] respectively even if the output of adders 6, 46 go to [2]. When the timing signal is given to the block C, the display device 51 displays [3] similarly.
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