发明名称 MULTI-VALUE CODING SYSTEM
摘要 PURPOSE:To narrower a power spectrum by applying decrease processing decreasing one level of a multi-value code series {bn} at every time the value of an information series {an} changes from ''0'' to ''1'' or from ''1'' to ''0'' when a multi-value code series {bn} reaches L-1 from the highest level. CONSTITUTION:A binary information series {an} is inputted from an input terminal 1 to a code switching detection circuit 2. The code switching detection circuit 2 generates a pulse when the binary information series {an} changes from ''0'' to ''1'' or from ''1'' to ''0'' and outputs a pulse train 3. A reset signal generating circuit 4 is started at first ahead of the operation of the coder to reset an adder/subtraction circuit 5 and a counter 6. Then the output level of the adder/ subtractor circuit 5 is increased by one level at each output pulse of the code switching detection circuit 2. On the other hand, the adder/subtractor circuit 5 decreases the output level by one level at each input of the pulse 3. Then a multi-value code series {bn}L is outputted to an output terminal 8 from the adder/subtractor circuit 5.
申请公布号 JPS60172827(A) 申请公布日期 1985.09.06
申请号 JP19840015917 申请日期 1984.01.30
申请人 NIPPON DENSHIN DENWA KOSHA 发明人 OOGURO KAZUHIRO;OONO HIROSHI
分类号 H03M5/20 主分类号 H03M5/20
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