发明名称 DEBUG SYSTEM OF INPUT AND OUTPUT DEVICE
摘要 PURPOSE:To perform freely debug operation with an input/output device with high efficiency by attaining an input/output request to an input/output device of an optional constitution for an optional input/output command using an optional input/output data. CONSTITUTION:An input/output request using an optional channel program and data is possible within a memory 3 by means of a console 4. Then an input/ output request is given to a peripheral device 30, i.e., a device to be tested via a channel 10 and a peripheral controller 20 and by means of a channel program set within the memory 3. When the input/output is through with said channel program, an end state showing whether or not the channel program is through in a normal state to the console 4 is displayed together with the data transfer end conditions showing the length of the data actually transferred and the contents of a buffer area obtained after the transfer of data. The same procedure is carried out also to a device 31 to be tested.
申请公布号 JPS60171546(A) 申请公布日期 1985.09.05
申请号 JP19840027247 申请日期 1984.02.17
申请人 NIPPON DENKI KK 发明人 SHIGETA TADASHI
分类号 G06F11/28;G06F11/36;G06F13/00 主分类号 G06F11/28
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