发明名称 CODE CONVERTER
摘要 PURPOSE:To attain high-speed m-bit/n-bit conversion at real time by providing plural block code converting circuits slower than an input period time of an signal of an input block in parallel. CONSTITUTION:A serial signal inputted to an input terminal 11 is inputted to a serial/parallel converting circuit 12 and outputted while being converted into a parallel signal having determined block length. The output signal is inputted to a seaparating circuit 13 and separated into plural parallel signals. The parallel signals are subjected respectively to code conversion by plural block code converting circuits 14. The output of the block code converting circuits is inputted to a selection circuit 15, selected and outputted periodically serially. The output is inputted to a parallel/serial circuit 16, where the signal is converted into a serial signal and outputted to an output terminal 17.
申请公布号 JPS60171830(A) 申请公布日期 1985.09.05
申请号 JP19840027824 申请日期 1984.02.15
申请人 NIPPON DENKI KK 发明人 MITOME MASANORI;IWASHITA MASAHIRO
分类号 H03M7/14;H04L25/49 主分类号 H03M7/14
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