发明名称 TELEVISION RECEIVER
摘要 PURPOSE:To eliminate harmonic disturbance due to a clock generating circuit by stopping the operation of the clock generating circuit when a slave picture plane is not displayed on a master picture plane. CONSTITUTION:A signal inputted from an antenna 11 is demodulated into a video/sound signal, and the demodulated signal and a video/sound signal from other video equipment 14 are fed to a switching circuit 16. The circuit 16 outputs the 1st signal forming the master picture plane and the 2nd signal forming the slave picture plane. A signal passing through a chrominance/video signal processing circuit 24 is written in a memory 26 by a slave picture plane synchronizing clock circuit 29 and the signal from the memory 26 is read by a master picture plane clock circuit 31 in synchronizing with a synchronizing circuit 18. A memory controller 30 stops the operation of the circuits 29, 31 when the slave picture plane is not driven.
申请公布号 JPS60171876(A) 申请公布日期 1985.09.05
申请号 JP19840027520 申请日期 1984.02.16
申请人 MATSUSHITA DENKI SANGYO KK 发明人 KUCHIKI TETSUO;KAWACHI MAKOTO;KOGA TOYOKATSU
分类号 H04N5/45 主分类号 H04N5/45
代理机构 代理人
主权项
地址