发明名称 Digital television signal processing circuit.
摘要 <p>An analog video signal of a PAL system is converted into a digital video signal by an A/D converter (12). The digital video signal is supplied to a delay device (13) so as to be subjected to hue correction and Y/C separation. The delay device (13) generates a plurality of digital video signals with different delay times. The digital video signals S1 (t) and S2(t) obtained from the delay device are supplied to a first subtracter (15), and the digital video signals S3(t) and S4(t) are supplied to a second subtracter (16). The outputs from the first and second subtracters are supplied to a third subtracter (19), and the output from the third subtracter (19) is multiplied with a coefficient, thereby obtaining a first chrominance signal U(t). The outputs from the first and second subtracters (15, 16) are supplied to a first adder (17), and the output from the first adder (17) is multiplied with a coefficient, thereby obtaining a second chrominance signal V(t).</p>
申请公布号 EP0153757(A2) 申请公布日期 1985.09.04
申请号 EP19850102272 申请日期 1985.02.28
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 NAKAGAWA, MASAKI;SUZUKI, SUSUMU
分类号 H04N9/64;H04N9/78;H04N11/04;(IPC1-7):H04N9/78 主分类号 H04N9/64
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