发明名称 SIGNAL PROCESSING CIRCUIT
摘要 PURPOSE:To make discrimination and reproduction suitable for high-speed large- capacity information transmission in the course of signal processing of optical communication, etc., by using discriminating circuits, whose phase are different from each other by 180 deg., of a frequency which is a half of a transmission bit rate. CONSTITUTION:A clock C, whose frequency is a half of a code bit rate, and discriminating timings phi1 and phi2 are produced from a transmission line code signal S at a timing generating circuit 20. The output of a discriminating circuit 10 is held and outputted by a latch circuit 100 at the fall of the clock C and the exclusive OR 101 of the output D1 of the latch circuit 100 and the output D2 of another discriminating circuit 11 is taken. The exclusive OR output is held and outputted by a latch 102 at the rise of the clock C and an output D is sent. Therefore, the discriminated decoding and discriminated and reproduced transmitting signal of the transmission line code can be realized at the same frequency as the information speed.
申请公布号 JPS60170361(A) 申请公布日期 1985.09.03
申请号 JP19840025001 申请日期 1984.02.15
申请人 HITACHI SEISAKUSHO KK 发明人 TAKAI ATSUSHI;NAKANO HIROYUKI;HANATANI SHIYOUICHI
分类号 H04B10/556;G11B20/10;H03M5/14;H04B10/00;H04B10/29;H04B10/524;H04B10/54;H04L25/40;H04L25/49 主分类号 H04B10/556
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