发明名称 METHOD AND APPARATUS FOR OPERATING A MICROPROCESSOR IN SYNCHRONISM WITH A VIDEO SIGNAL
摘要 <p>A microprocessor is provided in a television receiver which is responsive to a clock signal phase locked to a recurrent signal component of a composite video signal, such as a horizontal line rate signal component. The clock signal frequency is chosen: to be an integer multiple of the recurrent signal component frequency; and to enable the microprocessor to execute an integral number of unifrom instruction cycles during an integral number of periods of the recurrent signal component. The execution of the instruction cycles is brought into phase alignment with the recurrent signal component by causing the microprocessor to execute an instruction requiring an instruction cycle time interval which is greater than the time interval required to execute one of the uniform instruction cycles. The phase of subsequently executed uniform instruction cycles is shifted in this manner until signal sampling indicates that the desired phase relationship has been achieved.</p>
申请公布号 CA1192990(A) 申请公布日期 1985.09.03
申请号 CA19820406735 申请日期 1982.07.06
申请人 RCA CORPORATION 发明人 WARGO, ROBERT A.
分类号 H04N5/04;G06F3/14;H04N5/12;H04N5/445;H04N7/083;H04N7/087;H04N7/088;H04N9/44;H04N11/00;H04N11/24;H04N17/00;H04N17/02;H04N17/04;(IPC1-7):H04N7/00 主分类号 H04N5/04
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