发明名称 SAMPLE AND HOLD CIRCUIT
摘要 <p>A sample and hold circuit is disclosed, in which first and second terminals to which are supplied drive currents for turning ON and OFF a diode bridge are respectively connected through capacitors to a connection point between output electrodes of switching elements, a diode is connected between the first and second terminals for short-circuiting the capacitors when the diode bridge is made OFF, and input electrodes of the switching elements are respectively connected to first and second points of a reference potential whereby said diode bridge is made ON by a drive current flowing from the first point to the second point of the reference potential.</p>
申请公布号 CA1192948(A) 申请公布日期 1985.09.03
申请号 CA19820418554 申请日期 1982.12.23
申请人 SONY CORPORATION 发明人 ISHIKAWA, FUMIO
分类号 G11C27/02;H03K7/02;(IPC1-7):G11C27/02 主分类号 G11C27/02
代理机构 代理人
主权项
地址