发明名称 SEMICONDUCTOR DEVICE
摘要 PURPOSE:To reduce an insulating and isolating region, by performing the insulation and isolation of a P-channel MOS transistor and an N-channel MOS transistor by an insulating and isolating layer, in which a thin gate oxide film and a poly-Si layer are laminated. CONSTITUTION:A thin oxide film 19 is provided on a layer, which is to become a substrate for MOS transistors 101 and 111. The oxide film 19 isolates the transistors 101 and 111 and also isolates an N type substrate 1, a P type region 2 and the drain ends of the transistors 101 and 111. Under a poly-Si layer 20, the drain of the P-channel MOS transistor, the substrate, the substrate of the N- channel MOS transistor and the drain ends are arranged. Since the element isolating region is formed by self-alignment, the part beneath the layer 20 is the film 19. Therefore, the area required for the element isolation can be made small, and the compact element can be implemented.
申请公布号 JPS60169163(A) 申请公布日期 1985.09.02
申请号 JP19840024722 申请日期 1984.02.13
申请人 HITACHI SEISAKUSHO KK;HITACHI HARAMACHI DENSHI KOGYO KK 发明人 MIYAGAWA NOBUAKI;NAKAYAMA YASUSHI;YAZAWA YOSHIAKI;KAMEI TATSUYA
分类号 H01L27/08;H01L21/76;H01L27/092;H01L29/78 主分类号 H01L27/08
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