| 摘要 |
PURPOSE:To reduce the area of a semiconductor integrated circuit element while easily executing a complicate logic design by forming a gate oxide film and a gate electrode on both surfaces of a semiconductor layer and imparting different functions to upper and lower gate electrodes holding the semiconductor layer. CONSTITUTION:N<+> layers 5, 6 as source and drain regions, gate oxide films 7, source and drain electrodes 8, 9 and gate electrodes 10 are formed by using a normal silicon semiconductor technique, thus shaping a plurality of n channel MOS field-effect transistors. Since the thickness of a polycrystalline Si film 4 is reduced to 1mum through a plurality of thermal oxidation processes during a manufacturing process and the source and drain regions 5, 6 formed through thermal diffusion are shaped sufficiently thickly, the regions 5, 6 penetrate the polycrystalline Si film 4 and are in contact with an SiO2 film 3. The n channel MOS field-effect transistors have common second gates among elements and the first gates 10 independently for each element. Accordingly, these MOSFETs can be turned ON-OFF separately by using the first gates and can also be turned ON-OFF simultaneously by one signal by using the second gates. |
