| 摘要 |
PURPOSE:To reduce the number of address buffer circuits (set circuit) and to reduce power consumption in address selection of a storage device using an insulation gate electric field effect transistor (FET). CONSTITUTION:A system is designed to receive a single address input signal A0 by an address set circuit (address buffer circuit) 1, commonly impresses its outputs a0 and -a0 on an X selection decoder drive circuit 2 and Y decoder drive circuit 3, causes clock pulse phiX to drive said circuit 2, causes the Y decoder drive circuit to be driven by a clock pulse phiY whose phase is slower than that of the clock pulse phiX, and causes these respective drive circuit output signals to drive by time division the X decoder and Y decoder. The circuit 1 is composed of a dynamic flip.flop consisting of MOSFETQ1-Q2 so as to reduce a power consumption. |
