发明名称 SEMICONDUCTOR STORAGE CIRCUIT
摘要 <p>PURPOSE:To enable setting a reference signal electric potential according to variance in a production process and to obtain wide operation margin for a sensitive amplifier by providing plural reference cells where different potentials are supplied to a gate to set the reference signal potentials for the sensitive amplifier by selecting according to the plural fuse condition of these reference cells. CONSTITUTION:When a MOS transistor 62A is turned on and MOS transistors 62B and 62C are turned off, a reference cell MOS transistor 61A to which a constant potential V1 is supplied is selected, thereby allowing a reference signal potential VB supplied to a sense amplifier 10 to become a value VB1 similar to a conventional circuit. Supply voltage VC dependent characteristics of this potential VB1 become the same as VB shown in Fig. Where there is little variance in memory cell characteristics and data write is sufficiently executed, thus VC dependent characteristics for an input signal VA1 at the storaging time of ''1'' data and for an input signal VA1 at the storaging time of ''0'' data storage become the same as the solid line in Fig, thereby enabling appropriate retention of a difference between potential VB1 and potential VA0 or VA1.</p>
申请公布号 JPS60167197(A) 申请公布日期 1985.08.30
申请号 JP19840022185 申请日期 1984.02.09
申请人 TOSHIBA KK 发明人 ASANO MASAMICHI;IWAHASHI HIROSHI
分类号 G11C16/06;G11C17/00;(IPC1-7):G11C17/00 主分类号 G11C16/06
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