| 摘要 |
PURPOSE:To form the groove between an N-well and a P-well for prevention of latch-up in a CMOS in self-alignment by a method wherein a polycrystalline Si film is left only on an N-well or P-well forming region and oxidized only in its side wall part; thereafter, this oxide film is removed and a deep groove is formed in the Si substrate. CONSTITUTION:The pattern periphery of the polycrystalline Si film 9 is oxidized by using double-layer Si3N4 films 8 and 10 as a mask. Thereby, an SiO2 film 11 is formed by oxidation of only the side surface of the polycrystalline Si pattern 9. Thereafter, ion implantation is carried out by using the SiO2 11 and the polycrystalline 9 as a mask, and next the SiO2 11 is removed with hydrofluoric acid. Then, the exposed Si3N4 8' in the region of an aperture 50 is removed with heated phosphoric acid by using an SiO2 13 obtained by oxidation of the SiO2 12 and the Si 9 as a mask. After removal of a thin SiO2 7' in this region, the groove is formed by gas dry etching of the exposed part of the Si substrate 6 by using the SiO2's 12 and 13 as a mask. |
