| 摘要 |
PURPOSE:To improve the converging and stability performance by reproducing a comparatively stable data clock signal from an equalizing output signal and using the data clock signal to provide a more accurate reference signal where the shift of zero cross point of the equalizing output signal is suppressed. CONSTITUTION:The adaptive algorithm by means of the least square error method is realized except the generation of a reference signal in the basic operation of the titled device. Delay lines 10 and 11-1-11-5, in this case, correct the time delay for the generation of the reference signal by retarding equally a V0 and each tap output. When the equalization is incomplete, a zero cross detection signal is a signal inverted at a phase different from that of an original signal by means of the shift of zero cross point of the equalized output. When the shift amount of the zero cross point is not extremely larger in this case either, a discriminating output signal is operated invertingly at the phase of the trailing edge of the regenerated data clock just after the signal inversion of the zero cross detection signal takes place in order than the regenerated data clock signal represents a correct phase. Moreover, the regenerated data clock signal is a signal suppressing the phase fluctuation of the data clock of the equalized output signal by a phase synchronism circuit 8 and gives a comparatively stable phase. |
