| 摘要 |
PURPOSE:To enable acceleration of action and enlargement of the action permissible range by providing a pair of data lines in the column direction connected to both ends of plural memory cells arranged in a matrix shape, a selection line in the row direction and a differential sensor amplifier for detecting signals read out to the pair of data lines. CONSTITUTION:A memory cell 20 is connected to respective ends of n-channel type MOS transistors T1 and T2 for a transistor gate in correspondence to a pair of data lines BL and BL' in each column of a memory cell, a capacity element CM for holding memory information is connected between the other ends (nodes N1 and N2), and each gate is commonly connected to a word line WL. Such memory cells 20 are formed in each column by plural units, and connected to the corresponding word lines WL..., thereby forming a memory cell array. A pair of input terminals of a differential sensor amplifier 21 are connected to the pair of data lines BL and BL' in each column. |
