| 摘要 |
<p>PURPOSE:To acquire synchronism locally to attain a surer circuit operation by inputting a common input to each fundamental circuit consisting of a longitudinal layer structure and a load circuit to obtain an output signal which has a delay time proportional to the number of longitudinal layer stages. CONSTITUTION:A longitudinal layer MOS transistor Tr circuit 5 and its load circuit 6 are connected between a system minimum potential 2 and a system maximum potential 4 to constitute the fundamental circuit to which an input signal Vin is inputted. An output signal phi1 corresponds to the signal Vin and is generated by a TrT1 and a load circuit 61. An output signal phi2 is generated from the signal Vin by a longitudinal layer circuit of Trs T2 and T3 and a load circuit 62. Output signals phi3, phi4-phin are outputted similarly from one terminals of load circuits 63, 64.... In this longitudinal layer circuit, the degree of amplification is reduced in comparison with unit Trs and the delay time of the output signal to the input signal is increased according as the number of stages of series Trs is increased.</p> |
