| 摘要 |
PCT No. PCT/DE85/00026 Sec. 371 Date Sep. 25, 1985 Sec. 102(e) Date Sep. 25, 1985 PCT Filed Feb. 1, 1985 PCT Pub. No. WO85/03611 PCT Pub. Date Aug. 15, 1985.For the purpose of suppressing DC components and high energy components at different frequencies, digital signals are frequently transmitted in scrambled form. The realization of corresponding scramblers and descramblers is involved and difficult at high transmission rates. A self-synchronizing descrambler is provided which, due to parallel processing of the digital signals to be descrambled, has a relatively low working speed and is easy to manufacture in integrated technology. The descrambler employs a plurality of descrambler stages each including first and second modulo-2 adders and a shift register stage. |
