| 摘要 |
PURPOSE:To minimize the unbalance of the titled circuit by changing all transistors into self-alignment by a method wherein the gate electrodes of the first and second transistors are formed in open loop form, and those of the third and fourth transistors in loop form. CONSTITUTION:Transistors Q6 and Q7 are formed in the region surrounded by the gate electrodes G4 and G5 of latch transistors Q4 and Q5. The gate electrodes G6 and G7 are formed in loop form; the regions surrounded by the respective gates G6 and G7 serve as the source regions of the transistors Q6 and Q7, and the outsides of the regions serve as the drain regions, also the source regions of the latch transistors Q4 and Q5. All the transistors can be prepared in self-alignment, and the source and drain regions of each transistor always comes into the same area even when a mask slides. The unbalance of capacitances C3 and C4 does not generate, and then a dynamic flip-flop circuit stable and high- sensitive can be realized. |
