发明名称 MOS TRANSISTOR DEVICE
摘要 PURPOSE:To offer the titled device for high withstand voltage and large current which can maintain the property of high withstand voltage independently of the value of gate voltage and can be used on large currents by a method wherein an off-set part is provided with a double-diffusion layer. CONSTITUTION:Since an MOS transistor 11 is constructed as an off-set structural MOS transistor, an N<+> type diffusion layer 18 is kept away from a gate electrode 21 formed on an insulation layer 15 at a distance l in the horizontal direction, so that a drain region may not formed under the gate electrode 21. The off-set part provided between the gate region formed under the gate electrode 21 and the N<+> diffusion layer 18 acting as the drain region is provided with the double-diffusion layer 22, and the gate region is combined with the drain region by means of said double-diffused layer 22. The double-diffusion layer 22 consists of the first N<+> type diffused layer 23 provided between the diffused layer 18 and a P<-> type substrate 12 and formed in such a manner that one end reaches the lower part of the gate electrode 21, and of the second N type diffusion layer 24 existing in the diffusion layer 23 and formed so as to extend from the lower part of the electrode 21 to the diffusion layer 18.
申请公布号 JPS60163467(A) 申请公布日期 1985.08.26
申请号 JP19840018715 申请日期 1984.02.03
申请人 SEIKO DENSHI KOGYO KK 发明人 OZAKI MASAHARU;NISHIO HARUHIKO
分类号 H01L29/78;(IPC1-7):H01L29/78 主分类号 H01L29/78
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