| 摘要 |
PURPOSE:To attain efficient error processing by providing an interruption mask circuit at each error detection circuit to control the on/off state of a mask in response to the state of error detection. CONSTITUTION:The control of mask circuits MK1, MK2 is according to the table. Since both circuits 14, 18 do not detect any error in case 1 in Table, no interruption takes place. Since an error detection correcting circuit 18 only detects an error in case 2, the cause to the error is considered to be a fault of a bus DB in a logical device or the error detection correction circuit 18 itself, and in this case, the error is the hardware error, it is expected the error takes place successively and the mask MK2 is closed immediately. Since only a parity checker 14 detects an error in case 3, it is considered to be the hardware error and the mask MK1 is closed. In the case 4, a software error is considered in addition to the hardware error, and since the software is not consecutive, the masks MK1, MK2 are not closed immediately. |
