| 摘要 |
PURPOSE:To attain suppress spike and to miniaturize by forming a circuit in which plural switching MOS transistors (TRs) are connected in parallel and a circuit turning on sequentially the said TRs in response to a control signal with a prescribed time delay on one chip. CONSTITUTION:The MOS integrated circuit 1 is provided with a current control circuit formed on the same chip as the circuit 1, flowing a current from a power supply VDD to a load 3 connected to the outside of the circuit 1 when an output signal S from an MOS logic circuit 2 reaches a high level and activated in response to the signal S. The circuit 4 consists of a TR switch circuit 5 turning on/off a current flowing to the load 3 and a drive control circuit 6 outputting a drive signal of the circuit 5. Switching MOSTRs 51-54 of comparatively small current capacity are connected in parallel in the circuit 5 and the TRs 51-54 are turned on sequentially with a prescribed time difference by the circuit 6 when the signal S reaches a high level. Thus, generation of spike is suppressed in this way so as to switch a large current.
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