发明名称 CHROMINANCE SIGNAL PROCESSING CIRCUIT
摘要 PURPOSE:To reduce color blur and smear and to improve a chroma S/N by limiting a synthesized chrominance signal obtained by synthesizing a delay chrominance signal and an input chrominance signal, whose level is beyond the specified value by a limiter circuit. CONSTITUTION:An input carrier color signal Cin reproduced by a VTR is supplied from an input terminal 1 to a synthesizer 2. A signal C1 from the synthesizer is supplied to a synthesizers 5 and 6, and a 1H delay line 3. The synthesizer 6 subtracts a signal Cd of the delay line 3 from the signal C1 and outputs an output chrominance signal Cout to an output terminal 7. The synthesizer 5 sums up the signal Cd and the signal C1, and obtains a summed signal C2 to supply it to a limiter circuit 20. A circuit 20 limits the signal C2 when it is beyond the specified level and outputs it to a feedback circuit 4. The circuit 20 reduces color blur while maintaining charoma S/N improvement.
申请公布号 JPS60162394(A) 申请公布日期 1985.08.24
申请号 JP19840017693 申请日期 1984.02.01
申请人 MATSUSHITA DENKI SANGYO KK 发明人 HONJIYOU MASAHIRO
分类号 H04N9/64;H04N9/78 主分类号 H04N9/64
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