发明名称 LAMINATED SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PURPOSE:To obtain a through-hole construction which can expect a stable and high process yield by making a construction wherein a through-hole is provided in a semiconductor substrate, the aperture of the hole on one main surface is larger than the aperture of the hole on the other main surface, the internal wall of the hole is covered with an insulation film and at least a part of the insulation film covering the internal wall is covered with a conductor. CONSTITUTION:On the surface of a semiconductor substrate 40, a group of elements has been formed by selective doping, etc. A through-hole is provided in a part of the substrate and the through-hole consists of a smaller hole 41 and a larger hole 42. The internal surface of the through-hole is covered with a comparatively thick insulation film 43 such as an oxidized film, a conductive layer 44 formed in the through-hole and the semiconductor substrate 40 are electrically insulated and simultaneously, the parasitic capacity is reduced. The conductive layer in the through-hole is extended at the boundary of the smaller hole 41 and the larger hole 42, is formed a bonding pad 45 for the bottom surface of a chip and on it, a downward solder bump 46 is formed. The conductive layer 44 in the through-hole is connected to a bonding pad 48 against the upper surface of pitch through a multilayer wiring layer 47 at the side of the surface where the group of element is formed.
申请公布号 JPS60160645(A) 申请公布日期 1985.08.22
申请号 JP19840015191 申请日期 1984.02.01
申请人 HITACHI SEISAKUSHO KK 发明人 KETSUSAKO MITSUNORI
分类号 H01L25/18;H01L23/48;H01L23/485;H01L25/065;H01L25/07 主分类号 H01L25/18
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