| 摘要 |
PURPOSE:To give number of gradation and display elements sufficient for the luminance modulation system by providing a video RAM of a bank number corresponding to the gradation number and reading a display data from the RAM of the band corresponding to each frame so as to drive each display cell. CONSTITUTION:The display data for two screens' share displayed alternately on an EL dispaly is stored in the 1st and 2nd bank of video RAM 1a, 1b in the bit map system. A vertical synchronizing signal Vs of a CRTC in a main circuit 2 is generated at a point of time of change in each frame period so as to switch alternately the count number of a counter 5 to ''0'' or ''1''. Then MPX 3, 4 bring either of the RAM 1a, 1b to the read enable state. Read address signals A0-A10 are outputted to the MPX3 while the address number is integrated in matching with the timing of the display from the CRTC and the display data is inputted sequentially from the designated bank RAM by the counter 5 to a data input circuit E. |
